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FPGA İmplementation of Symbol Timing Synchronization for OFDM Systems

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Date

2018

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Publisher

Institute of Electrical and Electronics Engineers Inc.

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Abstract

In this work, after some of the commonly used symbol timing synchronization algorithms used in orthogonal frequency division multiplexing systems are examined, a two-step (coarse and fine) symbol time offset (STO) correction algorithm based on Schmidl & Cox [1] approach is investigated in Simulink model. Subsequently, relying on this Simulink model, the STO algorithm is implemented on ZYNQ ZC706 XC7Z045 FPGA working fully parallel at a clock rate of 200 MHz. The implementation results are compared with the other related studies in the literature. © 2018 IEEE.

Description

Aselsan; et al.; Huawei; IEEE Signal Processing Society; IEEE Turkey Section; Netas

Keywords

FPGA, OFDM, STo

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N/A

Source

-- 26th IEEE Signal Processing and Communications Applications Conference, SIU 2018 -- 2018-05-02 through 2018-05-05 -- Izmir -- 137780

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Start Page

1

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4
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